Messages in this thread | | | From | "H. Peter Anvin" <> | Subject | Re: [Bug 350] New: i386 context switch very slow compared to 2.4 due to wrmsr (performance) | Date | 18 Mar 2003 16:42:29 -0800 |
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Followup to: <Pine.LNX.4.44.0303181113590.13708-100000@home.transmeta.com> By author: Linus Torvalds <torvalds@transmeta.com> In newsgroup: linux.dev.kernel > > Wow. There aren't many things that AMD tends to show the P4-like "big > latency in rare cases" behaviour. > > But quite honestly, I think they made the right call, and I _expect_ that > of modern CPU's. The fact is, modern CPU's tend to need to pre-decode the > instruction stream some way, and storing to it while running from it is > just a really really bad idea. And since it's so easy to avoid it, you > really just shouldn't do it. >
AMD, I believe, has an "annotated" icache.
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