Messages in this thread | | | Date | Fri, 5 Dec 2003 18:48:28 -0800 | From | William Lee Irwin III <> | Subject | Re: SMP broken on Dell PowerEdge 4100/200 under 2.6.0-testxx? |
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On Sat, Dec 06, 2003 at 10:32:45AM +0800, Colin Coe wrote: >> CPU0 CPU1 >> 0: 633122 30 IO-APIC-edge timer >> 1: 207 IO-APIC-edge i8042 >> 2: XT-PIC cascade >> 4: 48 1 IO-APIC-edge serial >> 5: 449 1 IO-APIC-level eth1 >> 10: 135 1 IO-APIC-level aic7xxx >> 11: 1447 1 IO-APIC-level eth0 >> 12: 61 IO-APIC-edge i8042 >> 14: IO-APIC-level CS46XX >> 15: 14982 1 IO-APIC-level megaraid
On Fri, Dec 05, 2003 at 06:42:51PM -0800, William Lee Irwin III wrote: > 2.6 does balancing across packages, not logical cpus, so this will > happen and it will be largely harmless, except for what appears to > be some kind of bug where it's stealing the timer from logical cpu 1.
Replied-to text trimming bogon, apparently. They're "LOC:" for local APIC timer interrupts. What's reported for irq 0 above is odd though.
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