Messages in this thread | | | Date | Mon, 24 Nov 2003 12:06:12 +1100 | From | Anton Blanchard <> | Subject | Re: [RFC] generalise scheduling classes |
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> We still don't have an HT aware scheduler, which is unfortunate because > weird stuff like that looks like it will only become more common in > future.
Yep. Look at POWER5, 2 cores on a die sharing a l2 cache and 2 threads on each core. On top of that you have the higher level NUMA characteristics of the machine. So we need SMT as well as (potentially) 2 levels of NUMA. The overhead of enabling multi levels of NUMA may outweigh the gains, we need to do some analysis.
Looks like a lot of the other architectures are going multi core multi thread...
(HT is an intel trademark for what boils down to being SMT)
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