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SubjectRe: FEATURE REQUEST: Specific Processor Optimizations on x86 Architecture
"J.A. Magallon" <> writes:

> Patch inlined. Credits should go to Zwane Mwaikambo <>.
> It adds the corresponding flags for PII) and P4, and in case thei are defined,
> the *fence insn are used.
> Included is also one other patch by Zwane, which states that smp_call_function
> needs mb() instead of wmb().
> I use them regularly, so they look safe. Are they really better ? At least they
> do not touch any register, like the trick used till now.

The current code also does not touch any register. It has a gcc memory
barrier, which is costly, but needed.

The wmb() change is not needed, unless you have an oostore CPU
(x86 has ordered writes by default). It probably does not hurt
neither though (I do it the same way on x86-64), but also doesn't
change anything.

I think overall the patch is a very bad idea because it adds weird CPU
dependencies to the image again for very little again If you really
want to do this use alternative() and runtime patching. But it's
probably not worth the effort - don't do it until you can demonstrate
a difference in any benchmark.

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