Messages in this thread | | | From | Ron cooper <> | Subject | Re: Gigabit/SMP performance problem | Date | Fri, 3 Jan 2003 15:49:29 -0600 |
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On Friday 03 January 2003 12:05 pm, Martin J. Bligh wrote:
> Dual what Xeon? I presume a P4 thing. Can you cat /proc/interrupts? > Are you using the irq_balance code? If so, I think you'll only use > 1 cpu to process all the interrupts from each gigabit card. Not that > you have much choice, since Intel broke the P4's interrupt routing. >
You got my attention with this statement. I've have Dual Xeon Prestonias on an I860 chipset (IWill dp400). cat /proc/interrupts indeed shows CPU0 as processing all IRQ's instead of sharing them with CPU1 on a 2.4.x kernel.
Is there a work around for this, or is this *really* a problem? Some say it might be a problem depending on how many interrupts need to be processed per second. Others imply that cpu0 catching the irq's might be a good thing.
I happen to have PIII's using VIA chipsets that dont have this issue with proc/interrupts. This is very annonying, but I wonder if it is worth worrying about.
Ron.
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