Messages in this thread | | | Date | Mon, 20 Jan 2003 09:04:57 -0800 | From | "Martin J. Bligh" <> | Subject | Re: [patch] sched-2.5.59-A2 |
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> yes, but eg. in the idle-rebalance case we are more agressive at moving > tasks across SMP CPUs. We could perhaps do a similar ->nr_balanced logic > to do this 'agressive' balancing even if not triggered from the > CPU-will-be-idle path. Ie. _perhaps_ the SMP balancer could become a bit > more agressive.
Do you think it's worth looking at the initial load-balance code for standard SMP?
> ie. SMP is just the first level in the cache-hierarchy, NUMA is the second > level. (lets hope we dont have to deal with a third caching level anytime > soon - although that could as well happen once SMT CPUs start doing NUMA.)
We have those already (IBM x440) ;-) That's one of the reasons why I prefer the pools concept I posted at the weekend over just "nodes". Also, there are NUMA machines where nodes are not all equidistant ... that can be thought of as multi-level too.
> There's no real reason to do balancing in a different way on each level - > the weight might be different, but the core logic should be synced up. > (one thing that is indeed different for the NUMA step is locality of > uncached memory.)
Right, the current model should work fine, it just needs generalising out a bit.
M
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