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Ben, just because there does not appear to be a race in the code, does not provide any information about the hardware. On 14 Jan 2003, Benjamin Herrenschmidt wrote: > On Tue, 2003-01-14 at 18:49, Ross Biro wrote: > > Benjamin Herrenschmidt wrote: > > > > >Ok, but PIIX runs on intel platforms with real IOs, so there is no need > > >to perform a read... If we go the hwif->IOSYNC() way, we might well set > > >it up to no-op on x86 PIO iops by default and read of alt-status on > > >other archs if it's safe enough on other controllers/drives... > > > > > I believe that this will corrupt any inprogress UDMA transfer on the > > promise 20265 chip and probably others. It would be better to read the > > dma registers for the Promise controllers. > > You mean on the chip's other channel ? As we discussed earlier, we don't > need to enforce this delay at all for DMA as we wait for the DMA > controller to complete in the interrupt anyway. Or did I miss a race ? > > Ben. > > > - > To unsubscribe from this list: send the line "unsubscribe linux-kernel" in > the body of a message to majordomo@vger.kernel.org > More majordomo info at http://vger.kernel.org/majordomo-info.html > Please read the FAQ at http://www.tux.org/lkml/ > Andre Hedrick LAD Storage Consulting Group - To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/ | ||||||||||||
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