Messages in this thread | | | Date | Thu, 8 Aug 2002 10:33:42 +0200 (CEST) | From | Roland Kuhn <> | Subject | Re: kernel BUG at tg3.c:1557 |
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On Wed, 7 Aug 2002, David S. Miller wrote:
> From: Roland Kuhn <rkuhn@e18.physik.tu-muenchen.de> > Date: Thu, 8 Aug 2002 00:10:31 +0200 (CEST) > > Since the insertion of a dummy write solved the problem, I would say it's > the chipset's PCI reordering, which is malfunctioning in the 2466. > > Roland can you retry using this patch? The difference from > my previous one is that when we use the indirect register > writing of the mailbox registers, we offset into the GRCMBOX > area of the chip registers. > > This seems to be how Broadcom's driver does indirect accesses > to mailbox registers. > Will try in a minute. Do I understand it correctly, that only the mailbox writes must be done this way? And how do the pci_write_config_dword() functions ensure the right ordering? (Sorry, it was late yesterday and I somehow didn't find the definition of pci_*_config_*().)
Ciao, Roland
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