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SubjectRe: [PATCH] [RFC] [2.5 i386] GCC 3.1 -march support, PPRO_FENCE reduction, prefetch fixes and other CPU-related changes
On 04 Aug 2002 16:27:16 +0200
Luca Barbieri <ldb@ldb.ods.org> wrote:
[...]
> if [ "$CONFIG_MK7" = "y" ]; then
> define_int CONFIG_X86_L1_CACHE_SHIFT 6
> @@ -115,6 +144,26 @@
> define_bool CONFIG_X86_GOOD_APIC y
> define_bool CONFIG_X86_USE_3DNOW y
> define_bool CONFIG_X86_USE_PPRO_CHECKSUM y
> + define_bool CONFIG_X86_686 y
> + define_bool CONFIG_X86_MMX y
> + define_bool CONFIG_X86_MMXEXT y
> + define_bool CONFIG_X86_3DNOW y
> + define_bool CONFIG_X86_3DNOWEXT y
> + define_bool CONFIG_X86_USE_SSE_PREFETCH y
> +fi
Hi,
is there really support for SSE prefetch in athlons _without_ SSE?!
I don't know but this seems wrong...

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