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SubjectRe: PCI DMA to small buffers on cache-incoherent arch
Hi!

> The DMA_ALIGN attribute doesn't work, on some systems the PCI
> cacheline size is determined at boot time not compile time.
>
> Another note, it could be per-PCI controller what this cacheline size
> is. We'll need to pass in a pdev to the alignment interfaces to
> do this correctly.
>
> So none of this can be done at compile time folks.

But upper bound is certainly known at compile time, right?
Pavel
--
(about SSSCA) "I don't say this lightly. However, I really think that the U.S.
no longer is classifiable as a democracy, but rather as a plutocracy." --hpa
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