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SubjectRe: [PATCH] IDE 58
> I though about that, but what about corner cases where only a single
> register can be accessed ? (typically alt status). Provide specific
> routines ? Also, how does the extended addressing works ? by writing
> several times to the cyl registers ? That would have to be dealt with
> as well in each host driver then.

There are lots of cases we don't care about speed - things like setup of
the controller, changing UDMA mode etc.

> Right. We could go the darwin (apple) way and have taskfile_load/store
> functions doing the entire registers controlled by a bitmask of which
> registers has to be touched. it has a cost (testing each bit and
> conditionally branching, which can suck hard) but probably less than

Get yourself a conditional move instruction 8)

> an indirect function call which isn't predictable.

Or you have a small set of such functions for the critical paths - ie doing
actual block I/O which pass the set of values required to do that operation
and do the stores. What are the performance critical paths

Begin a disk write
Begin a disk read
PIO transfer in
PIO transfer out
End a disk I/O fastpaths (no error case)

Maybe ATAPI command writes ?

beyond that I doubt the rest are critical

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