Messages in this thread | | | Subject | Re: i8259 and IO-APIC | From | Alan Cox <> | Date | 27 May 2002 18:34:37 +0100 |
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On Mon, 2002-05-27 at 15:35, Terje Eggestad wrote: > Do you got any numbers that state that it's processing overhead, and not > HW latency that is the bulk of interrupt service time? Just curious, > I've been looking and can't find this "perceived fact" backed up by > facts anywhere.
It depends what the interrupt actually does. What I was saying is that the processing overhead is what hurts not the latency. If you think about a continual stream of events latency on the busses effectively skews the delivery time of the interrupt but not the rate of processing.
> BTW: according to "IA-32 Intel Arch. Software Developer's Man Vol 3" > both P3 and P4 the APIC bus is three wire, two data and one clock.
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