Messages in this thread | | | Subject | Re: SSE related security hole | Date | Thu, 18 Apr 2002 12:53:12 +0100 (BST) | From | Alan Cox <> |
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> > Intel folks are actually saying even back in Pentium MMX days that it isnt > > guaranteed that the FP/MMX state are not seperate registers > > In this case it would be possible to only do the explicit clear > when the CPU does support sse1. For mmx only it shouldn't be needed. > For sse2 also not.
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