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SubjectRe: VIA, 32bit PIO and 2.5.x kernel
Andre Hedrick wrote:
> On Fri, 12 Apr 2002, Jens Axboe wrote:
>
>
>>On Fri, Apr 12 2002, Petr Vandrovec wrote:
>>
>>>I believe that there must be some reason for doing that... And
>>>do not ask me why it worked in 2.4.x, as it cleared io_32bit
>>>in task_out_intr too.
>>
>>Because 2.4 doesn't use that path for fs requests. And be glad that it
>>doesn't otherwise _everybody_ would have much worse problems than you
>>are currently seeing.
>
>
> Maybe if everyone ever bothered to look at the code base and not assume
> they know everything ... and enjoying feable attempts to cast me as a
> fool. Better yet maybe understand the hardware ...
>
> ata_input_data
>
> io_32bit = drive->io_32bit;
>
> if (io_32bit)
> insl(IDE_DATA_REG, buffer, wcount);
> else
> insw(IDE_DATA_REG, buffer, wcount<<1);
>
> or
>
> ata_output_data
>
> io_32bit = drive->io_32bit;
>
> if (io_32bit)
> outsl(IDE_DATA_REG, buffer, wcount);
> else
> outsw(IDE_DATA_REG, buffer, wcount<<1);
>
>
> WHOA is it not obvious it is the total number of calls to the same damn
> DATA-TASKFILE-REGISTER-PORT
>
> Which is only SIXTEEN BITS WIDE!
>
> So please contine to write 32 bits to a 16 bit wide address...
> Legacy or not the physical layer to the device, so please go look there.
> Why do I even bother, all of you are so much smarter than me.

The physical register on the side of the device may very well be
only 16 bit's wide. Most propably it's simple implementation dependant.
I saw many 68000 derivatives on IDE controllers but those days there
are many 32 bit controllers there as well.

But please note that the ata host-chip xor the CPU (think 386sx)
is multiplexing the access to it. Otherwise it wouldn't be possible to do 32 bit
transfers over a cable with only 16 data lines at all.

Apparently you don't even understand the physical transport layer,
which explains the presence of the bug in question.

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