Messages in this thread | | | Date | Sat, 16 Mar 2002 20:22:41 -0800 (PST) | From | S W <> | Subject | Re: 2.4.19-pre2 CentaurHauls VIA Samuel 2 stepping 2 SEGFAULT (RESOLVED) |
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I pulled the chipset datasheet for CentaurHauls VIA Samuel 2 stepping 2.
Two seperate i386/kernel/setup.c fixes things seems to fix this chipset.
1. Disabled the Branch Predictor in MSR_VIA_FCR 2. cachesize=0
Other attempts to fix this were: 3. Disabling L2 Cache OOP'd so that's not an option. 4. Disables I-Cache (too slow) 5. Disables D-Cache OOP'd 6. Disables Page Directory Cache is a NOP.
I've settled for cachesize=0.
Hope this is not a trend here.
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