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    SubjectRe: Missed jiffies
    "H. Peter Anvin" wrote:
    > Followup to: <>
    > By author: george anzinger <>
    > In newsgroup:
    > >
    > > One of the nasty problems, especially with machines such as yours (i.e.
    > > lap tops), is the fact that TSC is NOT clocked at a fixed rate. It is
    > > affected by throttling (reduced in 12.5% increments) and by power
    > > management.
    > If the TSC is affected by HLT, throttling, or C2 power management, the
    > TSC is broken (as it is on Cyrix chips, for example.) The TSC usually
    > *is* affected by C3 power management, but the OS should be aware of
    > C3.
    > -hpa
    Gosh I would LIKE to think this is true. Could you give a reference? I
    believe Andrew Grover thinks that what I have stated is true. If I am
    wrong, it will make the high-res-timers MUCH more acceptable as the TSC
    overhead is MUCH lower that the ACPI pm timer.

    Do I have this right Andrew?
    Real time sched:
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