Messages in this thread | | | From | David Mosberger <> | Date | Mon, 11 Feb 2002 21:50:12 -0800 | Subject | Re: thread_info implementation |
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>>>>> On Mon, 11 Feb 2002 21:32:48 -0800 (PST), "David S. Miller" <davem@redhat.com> said:
DaveM> BTW, your "4 issue" comments assume the cpu can do 4 non-FPU DaveM> instructions per cycle, most I am aware of cannot and I think ia64 DaveM> even falls into the "cannot" category. Doesn't it?
Itanium can certainly issue 5 non-fp instructions per cycle (not very common, but possible). 4-issue is easy.
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