Messages in this thread |  | | | Date | Wed, 13 Feb 2002 02:30:37 +0100 | | From | Roman Zippel <> | | Subject | Re: thread_info implementation |
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Hi,
"David S. Miller" wrote:
> So you essentially made your cache one cacheline smaller. > > Not at all, that cacheline has to be in the cache anyways because > it also holds all the other information which needs to be accessed > during trap entry/exit. > > Try again.
Larger code size due to the extra load? At least two cache lines needed for any access to task_struct? David, what are you trying to prove? Any architecture which has a thread register prefers to access data directly through this register and it's not really difficult to avoid this indirection, that might be needed on ia32.
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