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while reviewing the sysenter trampoline code i started wondering about the HT case. Dont HT boxes share the MSRs between logical CPUs? This pretty much breaks the concept of per-logical-CPU sysenter trampolines. It also makes context-switch time sysenter MSR writing impossible, so i really hope this is not the case. Ingo - To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/ | |||||||||
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