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On Thu, Dec 12, 2002 at 03:36:46PM -0500, Mark Mielke wrote: > On Thu, Dec 12, 2002 at 10:42:56AM +0100, Terje Eggestad wrote: > > On ons, 2002-12-11 at 19:50, H. Peter Anvin wrote: > > > Terje Eggestad wrote: > > > > PS: rdtsc on P4 is also painfully slow!!! > > > Now that's just braindead... > > It takes about 11 cycles on athlon, 34 on PII, and a whooping 84 on P4. > > For a simple op like that, even 11 is a lot... Really makes you wonder. > > Some of this discussion is a little bit unfair. My understanding of what > Intel has done with the P4, is create an architecture that allows for > higher clock rates. Sure the P4 might take 84, vs PII 34, but how many > PII 2.4 Ghz machines have you ever seen on the market? > > Certainly, some of their decisions seem to be a little odd on the surface. > > That doesn't mean the situation is black and white. Assume a 1GHz P-III. 34 clocks @ 1GHz = 34 ns. 84 clocks @ 2.4 GHz = 35 ns. That's actually slower. Fortunately the P4 isn't this bad on all instructions. -- Vojtech Pavlik SuSE Labs - To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/ | |||||||||
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