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SubjectRe: NMI handling rework for x86
Corey Minyard writes:
> diff -urN linux.orig/arch/i386/kernel/nmi_watchdog.c linux/arch/i386/kernel/nmi_watchdog.c
> --- linux.orig/arch/i386/kernel/nmi_watchdog.c Thu Oct 24 19:56:54 2002
> +++ linux/arch/i386/kernel/nmi_watchdog.c Thu Oct 24 20:54:19 2002
...
> +static int k7_watchdog_reset(int handled)
> +{
> + unsigned int low, high;
> + int source;
> +
> + rdmsr(MSR_K7_PERFCTR0, low, high);
> + source = (low & (1 << 31)) == 0;
> + if (source)
> + wrmsr(MSR_K7_PERFCTR0, -(cpu_khz/nmi_hz*1000), -1);
> + return source;
> +}

and similar code in p6 and p4 watchdog_reset.

- Why are you reading the perfctrs with RDMSR instead of RDPMC?
RDMSR is noticeably slower on most post-P5 CPUs.
- "(low & (1 << 31)) == 0" looks like a convoluted and inefficient
way of computing "(int)low >= 0".
- The p6 and k7 watchdog_reset procedures are identicial, except
for the actual MSR number used. The original nmi.c makes the
number a parameter and shares the code, causing less code bloat.

/Mikael
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