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SubjectRe: [CFT] faster athlon/duron memory copy implementation
On Thu, Oct 24, 2002 at 12:01:54PM -0700, erich@uruk.org wrote:
> The perfect peak performance of your setup, if the cache implements
> standard write-allocate behavior (the target cache line is read before it
> is written because the write logic doesn't know you're going to overwrite
> the whole line in cases like this), should be:

the point is to avoid the (in this case bad) write allocate...

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