Messages in this thread | | | Date | Fri, 2 Feb 2001 19:20:34 +0100 (MET) | From | "Maciej W. Rozycki" <> | Subject | Re: mpparse.c question |
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On Fri, 2 Feb 2001, Ingo Molnar wrote:
> (hm, dont we have an assert in there to catch ISA IRQs bound to the second > IO-APIC?) In any case, it would be a very surprising move if anyone added > a second IO-APIC for the sake of *ISA* devices. This would be truly > backwards.
It's just the matter of the order I/O APICs are listed in the MP table. I think it's only the limited number of multiple-I/O APIC systems available so far that prevented from a reverse listing to happen. Given recent developments which lead to more such systems (e.g. using the infamous ServerWorks chipset which embeds two I/O APICs internally), it's only the matter of time until this happens, I'm afraid.
No need to hurry, though -- we might fix the problem once (if) it appears.
-- + Maciej W. Rozycki, Technical University of Gdansk, Poland + +--------------------------------------------------------------+ + e-mail: macro@ds2.pg.gda.pl, PGP key available +
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