Messages in this thread | | | Date | Wed, 24 Jan 2001 12:50:38 -0600 | From | Timur Tabi <> | Subject | Re: Page Attribute Table (PAT) support? |
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** Reply to message from Jeff Hartmann <jhartmann@valinux.com> on Wed, 24 Jan 2001 11:45:43 -0700
> I'm actually writing support for the PAT as we speak. I already have > working code for PAT setup. Just having a parameter for ioremap is not > enough, unfortunately. According to the Intel Architecture Software > Developer's Manual we have to remove all mappings of the page that are > cached. Only then can they be mapped with per page write combining. I > should have working code by the 2.5.x timeframe. I can also discuss the > planned interface if anyone is interested.
I'm interested. Would it be possible to port this support to 2.2, or would that be too much work?
-- Timur Tabi - ttabi@interactivesi.com Interactive Silicon - http://www.interactivesi.com
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