Messages in this thread | | | Date | Sat, 20 Jan 2001 00:38:12 -0500 | From | Johannes Erdfelt <> | Subject | Inefficient PCI DMA usage (was: [experimental patch] UHCI updates) |
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On Fri, Jan 19, 2001, Miles Lane <miles@megapathdsl.net> wrote: > Johannes Erdfelt wrote: > > > TODO > > ---- > > - The PCI DMA architecture is horribly inefficient on x86 and ia64. The > > result is a page is allocated for each TD. This is evil. Perhaps a slab > > cache internally? Or modify the generic slab cache to handle PCI DMA > > pages instead? > > This might be the kind of thing to run past Linus when the 2.5 tree > opens up. Are these inefficiencies necessary evils due to workarounds > for whacky bugs in BIOSen or PCI chipsets or are they due to poor > design/implementation?
Looks like poor design/implementation. Or perhaps it was designed for another reason than I want to use it for.
2.5 is probably where any core changes will happen, if any. But for now I suspect I'll need to workaround it in my driver.
I should also check architectures other than x86 and ia64.
JE
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