Messages in this thread |  | | | Date | Fri, 28 Jul 2000 08:38:46 +0000 | | From | Peter Rival <> | | Subject | Re: Cache coherency... and locking |
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Oliver Xymoron wrote:
> On Thu, 27 Jul 2000, Linda Walsh wrote: >
<snip>
> > > Talking with an internal engineer here -- NUMA uses MESI > > cache control similarly to the i386 cache coherency model, > > so a write of one CPU to a an area of memory will be seen > > on other processors as soon as they ask for that memory. > > That's specific to MIPS. A general Linux NUMA model probably won't assume > coherence. >
Why are we not going to assume coherence? What NUMA platforms do we intend to support in the relevant future that are not CC-NUMA? AFAIK, the only NUMA platforms we support so far are the SGI Origin 2X00 series (CC-NUMA) and the Compaq AlphaServer GS* series (also CC-NUMA).
I just don't want generic code to have to pay too heavy a price for future support of a platform we never support. And truth be told, at that point we'd be better off just running with Larry's idea of multiple semi-independent operating systems and handling the lack of cache coherence in a sane and well-defined way.
- Pete
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