Messages in this thread |  | | | Date | Thu, 9 Mar 2000 05:30:00 +0100 (CET) | | From | Andrea Arcangeli <> | | Subject | Re: [PATCH] Use of TSC with SMP and different CPU's |
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On Wed, 8 Mar 2000, Boris Okun wrote:
>Andrea Arcangeli wrote: > >> The timer irq could keep running on the same CPU with irq disabled for >> more than the rtdsc lower 32bits wrap around. Thus the per-cpu rdtsc info > >Why? Could you explain the difference (or point me to the refs)? >Who decides where timer irq happens? >If this is the case, I certainly agree with the statement below. >I don't see it here.
I understand it's not easy to reproduce (mainly with two cpus) but the IO-APIC chooses the CPU where to deliver irq in hardware and you can't know which CPU will run the irq handler. So you shouldn't rely on the timer irq to run on all CPUs in the system in a certain amount time.
Andrea
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