[lkml]   [2000]   [Mar]   [30]   [last100]   RSS Feed
Views: [wrap][no wrap]   [headers]  [forward] 
Messages in this thread
    SubjectRe: Timestamp counters on SMP
    Alan Cox wrote:
    > > Correct. Transmeta Longrun and Intel Speedstep do change the clock
    > > frequency, though; however, at least Transmeta will still present a
    > > constant-frequency TSC to the RDTSC instruction. Don't know about
    > > Intel.
    > I believe Intel also keeps constant TSC.
    > > (Now, some broken Cyrix chips would lose or not increment the TSC when
    > > throttled.)
    > They stop the TSC when the CPU is suspended completely. Thats actually very
    > nice behaviour on a power sensitive device.

    Right, but from a software viewpoint you'd like to KNOW wether or not
    you can depend on tsc continuing to increment or not when the CPU is
    powered down.

    If in normal operation you have 5M transistors doing interesting
    things, you could keep a few hundred of them active to keep a 20 bit
    counter running. (Power up the rest of the counter when a carry


    ** ** ** +31-15-2137555 **
    *-- BitWizard writes Linux device drivers for any device you may have! --*
    * Common sense is the collection of *
    ****** prejudices acquired by age eighteen. -- Albert Einstein ********

    To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
    the body of a message to
    Please read the FAQ at

     \ /
      Last update: 2005-03-22 13:57    [W:0.024 / U:11.308 seconds]
    ©2003-2016 Jasper Spaans. hosted at Digital OceanAdvertise on this site