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SubjectRe: i8259 IRQ problems
"Maciej W. Rozycki" wrote:
>
> On Thu, 23 Mar 2000, Manfred Spraul wrote:
>
> > 1) why do we use 0x30 for the INVALIDATE_TLB_INTERRUPT?
> > The interrupt is extremely time critical [another cpu waits for
> > completion], and very short.
> >
> > Shouldn't we use an interrupt with the highest io apic priority?
> > [0xF0..0xFF]?
>
> AFAIR, APIC does not use the priority to choose the sequence of
> dispensing interrupts. It dispenses them in the order they arrive.

I'm not sure:
1) what happens if the cpu runs with disabled local interrupts, the
local apic accepts multiple interrupts. The cpu reenables the local
interrupts.
Now the tlb flush interrupts should be handled first.

2) we are in the middle of a level triggered interrupt.
We do not ack the interrupt until the end of the interrupt handler. And
the APIC will deliver higher priority interrupts immediately, but lower
priority interrupts wait for the EOI.

> We do not use this model -- the task priority register is
> set to zero once and forever.

The task priority remains 0, but the local apic maintains a "Processor
priority register", and this one changes automagically.

--
Manfred

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