Messages in this thread | | | Date | Fri, 10 Nov 2000 15:33:54 -0500 | From | Brian Gerst <> | Subject | Re: [Fwd: CPU detection revamp (Request for comments)] |
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davej@suse.de wrote: > > On Fri, 10 Nov 2000, Brian Gerst wrote: > > > > features : fpu vme de pse tsc msr mce cx8 pge mmx syscall 3dnow > > > > The K6's don't support sysenter/sysexit. > > The K6 datasheets suggests otherwise. > Some models seem to have sysenter/sysexit, whilst others have > syscall/sysret. No model seems to have both. > > The datasheets are somewhat confusing, as it doesn't mention bit 10 > at all, just an oversized box for bit 11.
The Athlons support sysenter and syscall, but the K6's only support syscall. The earlier version of syscall (bit 10) is undocumented by AMD.
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