lkml.org 
[lkml]   [2000]   [Oct]   [13]   [last100]   RSS Feed
Views: [wrap][no wrap]   [headers]  [forward] 
 
Messages in this thread
/
Date
From
SubjectRe: IRQ affinity vs. MTRRs, was Re: 36 bit MTRRs, Re: test10-pre1 problems on 4-way SuperServer8050
On Thu, 12 Oct 2000, James Simmons wrote:

>
> > > every CPU to avoid slowdowns. So that if you set that eth0's
> > > IRQ will be handled by CPU1, the MTRRs of CPU1 will be set
> > > accordingly, and the other CPUs will not care about eth0,
> > > so they do not need eth0's MTRR settings.
> >
> > A little question. Why do we want to bind irq of eth0 to a single CPU ?
> > imho it will casue slowdown of some situation. Why don't we leave scheduler
> > to select CPU for processing IRQ ?
>
> This would be really horrible for video cards. X would come to a crawl :-(

Why? You are not forced to exclude the videocard memory from MTRRs.
I meant things that make sense, e.g. 4 eth card, 4 CPUs, every CPU is
bound to one and only one eth, so only the relevant CPU needs to contain
an entry for the eth it is bound to. It may make sense.

Regards,
Zoltan Boszormenyi


-
To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
the body of a message to majordomo@vger.kernel.org
Please read the FAQ at http://www.tux.org/lkml/

\
 
 \ /
  Last update: 2005-03-22 12:45    [W:0.105 / U:0.028 seconds]
©2003-2020 Jasper Spaans|hosted at Digital Ocean and TransIP|Read the blog|Advertise on this site