lkml.org 
[lkml]   [2000]   [Oct]   [12]   [last100]   RSS Feed
Views: [wrap][no wrap]   [headers]  [forward] 
 
Messages in this thread
/
Date
From
SubjectRe: [RFC] atomic pte updates for x86 smp
}    Date: 	Thu, 12 Oct 2000 00:03:31 -0400 (EDT)
} From: "Benjamin C.R. LaHaise" <blah@kvack.org>
}
} It's safe because of how x86s hardware works
}
} What about other platforms?
On the PPC's that don't do a hardware walk we do a normal write to the
hash table (with a spinlock). On the hardware walk PPC's I'm told this is
done with with a lwarx/stwcx pair (conditional load/store on exclusive
access).

Any comments on how this would affect PPC?
-
To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
the body of a message to majordomo@vger.kernel.org
Please read the FAQ at http://www.tux.org/lkml/

\
 
 \ /
  Last update: 2005-03-22 12:39    [from the cache]
©2003-2011 Jasper Spaans