[lkml]   [2000]   [Jan]   [27]   [last100]   RSS Feed
Views: [wrap][no wrap]   [headers]  [forward] 
Messages in this thread
    SubjectRe: Code optimization <LEA Instruction>
    Followup to:  <>
    By author: "Richard B. Johnson" <>
    In newsgroup:
    > On Thu, 27 Jan 2000, Alan Cox wrote:
    > > > One of the things it states is that the LEA instruction can
    > > > be used to change the value of an index register faster than
    > > > using the ADD instruction (Page G-10, Intel '486 Rag).
    > >
    > > It is
    > It is not. Never was and can't possibly be. Further, tests show
    > as expected, that address generation takes more time than register
    > addition.

    Huh? LEA is just accessing what is, in effect, a third ALU. Either
    should be the same speed, *but* you have to worry about scheduling,
    which is CPU-dependent. P6 cores have two "normal" ALUs and one
    address-generation one. One thing LEA lets you do is a three-register
    operation, which the normal ALUs can't do:

    lea eax,[ebx+esi]

    ... instead of ...

    mov eax,ebx
    add eax,esi

    (On Crusoe, of course, either of these become a single VLIW "add" atom
    and thus are completely equivalent.)

    <> at work, <> in private!
    "Unix gives you enough rope to shoot yourself in the foot."

    To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
    the body of a message to
    Please read the FAQ at

     \ /
      Last update: 2005-03-22 13:56    [W:0.021 / U:102.308 seconds]
    ©2003-2017 Jasper Spaans. hosted at Digital OceanAdvertise on this site