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SubjectRe: PATCH: POSIX 1003.1b timer minor fixes
On Jul 29, Robert H. de Vries wrote:

> This little program tells you how many cycles went by between two reads of
> the TSC.
>
> #include <stdio.h>
> #include <asm/msr.h>
>
> int main(void)
> {
> long long p1, p2, p3, p4;
>
> rdtscll(p1);
> rdtscll(p2);
> rdtscll(p3);
> rdtscll(p4);
>
> printf("p1: %Ld\n", p1);
> printf("p2: %Ld [%Ld]\n", p2, p2-p1);
> printf("p3: %Ld [%Ld]\n", p3, p3-p2);
> printf("p4: %Ld [%Ld]\n", p4, p4-p3);
>
> return 0;
> }
>
> The output on my Pentium II 450 MHz is:
>
> p1: 61897741731009
> p2: 61897741731042 [33]
> p3: 61897741731074 [32]
> p4: 61897741731107 [33]

for my AMD K6/2-400 it's different (and depends on optimisation)

# cc tsc.c ; ./a.out
p1: 303753706861528
p2: 303753706861537 [9]
p3: 303753706861563 [26]
p4: 303753706861572 [9]

# cc -O tsc.c ; ./a.out
p1: 303755356275726
p2: 303755356275758 [32]
p3: 303755356275767 [9]
p4: 303755356275776 [9]

different optimisation levels all give the same results, so does using
gcc-2.7.2.3 vs. egcs-2.91.66.



Harald
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