Messages in this thread | | | Date | Mon, 7 Jun 1999 13:29:41 +0200 | From | Ralf Baechle <> | Subject | Re: Linux address mapping |
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On Sun, Jun 06, 1999 at 06:11:01PM +0200, Andrea Arcangeli wrote:
> Agreed. btw, also the MIPS is capable to refill the TLB in software (not > such surprising since it's a RISC CPU too :). I don't know if it's using > page tables for the kernel or not in linux though. If not it could resolve > the phys address without access pgtables in memory too.
On 32-bit Linux/MIPS we have a special address range from 0x80000000 - 0xa0000000 named KSEG0 which is mapped to physical address zero. This area is part of the architecture, that is doesn't need a TLB entry. This also implies that using KSEG0 limits Linux/MIPS to 512mb memory at most.
For 64-bit CPUs 8 additional address spaces of 2^40 bytes and reserves to grow them for future architecture versions are available. These address spaces are also 1:1 mapped to physical address zero, thus raising the memory limit to 1TB.
In short, for kernel memory Linux/MIPS never ever takes TLB faults, so why having page tables for it at all ...
Ralf
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