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SubjectRe: Weird PCI problem

On Sat, 17 Apr 1999, Rogier Wolff wrote:

> Gerard Roudier wrote:
> > If you can do that, then, I will recommend you to do at least:
> >
> > - Read this base address register
> > - Warn if any of bit 1, 2 or 3 is set.
> > - Mask all the bits that should have read zero (bit 0,1,2,3)
> > - Rewrite this base address register
> > - Read it again and warn if any bit 0, 1, 2 or 3 is still set.
>
> In my opinion that last one should be "bail out if any of the
> addressing type bits is still set".

Indeed. It was just a minimal recommendation against just silently trying
to clear the offending bits. I didn't encourage to let the driver blindly
attach the device and tamper the address as a memory mapped address.
I obviously assumed this not to happen if the last read of the bits
returned wrong values.

> The PLX (which I understand is the PCI bridge for the card) is capable
> of mapping stuff into IO space as well as into memory space. It will
> simply do whatever the bit is set at. You're supposed to program the
> eeprom in such a way that the bit becomes read-only, but it is
> certainly writeable in hardware, and the device will honour whatever
> it is set at.
>
> Telling the chip you want a 64k IOmapped window is probably going to
> crash the machine sooner or later.

If this window does not conflict and no driver will tamper the window and
the chip hasn't exploded at the time this bit 0 has been set, then nothing
bad should happen when attempting to clear this bit 0, in my opinion. :-)

Regards,
Gérard.


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