Messages in this thread | | | Date | Tue, 9 Mar 1999 11:45:21 +0100 (MET) | From | Gabriel Paubert <> | Subject | Re: user space writel() etc. in 2.2.2 |
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On Fri, 5 Mar 1999, Gerard Roudier wrote:
> > > PMac - PCI bus is endian swapped in hardware > > This is pretty useless and highly stupid, IMO for the following reasons:
I think there is some misunderstanding on that one. > > 1 - This only can speed-up a bit IOs from the CPU and the PCI BUS is slow > compared to CPU. Having some instructions that deal with endian-ness > does suffice.
That's exactly how it's done (using byte swapping instructions).
> 2 - The right way to do IOs with PCI is to DMA from the device and > certainly not to stall the CPU and to use small bursts or no > bursts at all.
Indeed, and that's how it done with sane devices. The annoying exception is non-DMA IDE when required, don't tell me that you want DMA to access NVRAM once per boot or to reprogram the firmware Flash PROM).
Most PPC boxes (there are exceptions), are not exactly endian swapped in hardware as you might understand it (I think Alan's statement was confusing): the bridge conserves byte addresses (modulo a constant offset). This means that, whatever the amount of bytes of bytes you are trying to transfer, the relative address of each individual byte in the stream is the same on both sides of the bridges. For example if you want to write to a 32 bit register in a PCI device, you have to swap bytes before presenting data on the processor bus so that the most significant byte goes to the highest address.
It seems however that people have trouble understanding that they have to use byte swapping instructions when setting up IDE control registers but not when actually transferring data (in PIO mode), and this has caused bugs (which are actually only seen when transferring a drive between an x86 and PPC box).
Gabriel.
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