Messages in this thread Patch in this message | | | Subject | [Patch] identifying Cyrix Cx486SLC/DLC procesors | Date | Thu, 04 Mar 1999 23:18:13 +0100 | From | Bodo Bellut <> |
| |
[ If you reply to this message, please CC me at bodo@garfield.ping.de, I don't have the time to read linux-kernel :-( ]
Hi,
I just discovered, that Kernel 2.2.2 (including ac7) has a misplaced closing brace so it does not correctly identify the Cyrix Cx486SLC/DLC (patch against 2.2.2 attached). Additionally the routine checks for an FPU to distinguish between the SLC (no FPU) and the DLC (with FPU). This, however, is not The Right Way, since even the Cx486DLC doesn't have an FPU on chip, but the SLC is the replacement for the 80386SX and the DLC is the replacement for the 80386DX, so the difference between the SLC and the DLC is the bus width. I, however, don't know hos to check for this.
As final note: The DLC (don't know about the SLC) has a 1KB on chip cache, either 2-way-set-associative or direct mapped which could be used by Linux, but I don't know how to activate it...
--begin-patch-- --- linux-2.2.2/arch/i386/kernel/setup.c.OLD Thu Mar 4 22:01:38 1999 +++ linux-2.2.2/arch/i386/kernel/setup.c Thu Mar 4 23:04:30 1999 @@ -549,8 +549,8 @@ dir0_msn = 0; p = Cx486S_name[0]; break; - break; } + break; default: /* unknown (shouldn't happen, we know everyone ;-) */ dir0_msn = 7; --end-patch-- cu, Bodo -- Bodo Bellut bodo@garfield.ping.de | USE PGP! +-----------+ Klosterstr. 7 | (key via server |\ O---m /| 44135 Dortmund Fon: +49-231-5860337 | or on request) |/---------\| PGP: 768/FA18A639 AE 5A 47 40 5A A0 D6 15 8E 54 44 AA 8D DD 6E BD+-----------+
- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majordomo@vger.rutgers.edu Please read the FAQ at http://www.tux.org/lkml/
| |