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    SubjectRe: Thread-private mappings and graphics (was Re: Per-Processor Data Page)
    On Tue, Dec 21, 1999 at 01:16:06AM +0000, David Wragg wrote:
    > Yes, but you will typically also need a memory barrier instruction,
    > won't you?

    Yes, but which flavour depends on the surrounding context.

    > I have seen figures (from a DEC/Compaq guy) for the cost of
    > an uncontended mutex lock+unlock over the Alpha generations, and it
    > looked to have stayed pretty constant relative to the typical IPC for
    > the processors. I suppose that as ll/sc has got cheaper, the memory
    > barriers have got more expensive.

    Not really. Add a full `mb' and the total comes to 70 cycles
    on an ev56. More expensive, yes, but a far cry from ev4 lossage.
    The effect of `wmb' isn't visible in small tests.


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