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SubjectRe: spin_unlock optimization(i386)


On Wed, 24 Nov 1999, Erich Boleyn wrote:
>
> What do you want the memory barrier for other than to prevent reads
> from crossing the unlock? (apologies if I missed this in an earlier
> message)

We also want writes not to cross the unlock, but that part we were already
fairly confident about: the strong write ordering is something that Intel
has documented well, and we weren't worried.

But the read/write ordering is _not_ documented as such very well, and it
was not at all clear that the CPU couldn't speculate a non-locked write to
after a non-locked read (or, depending on how you see it, alternatively
lazily do the read after it did the write). That's why people (me in
particular) were really worried about the implications of having a
non-locked write as the lock release mechanism.

Linus


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