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    SubjectRe: Signal driven IO
    > completion ports have two features which RT SIGIO doesn't provide.  One
    > is processor affinity; on SMP systems, when a completion port becomes
    > ready, the system will try to schedule the callback thread on the same
    > processor which registered the callback originally. The other is thing
    > which NT does is LIFO ordering when multiple completion ports are to be
    > scheduled. Both of these strategies are an attempt to avoid cache
    > misses. I'm not sure how much different these tricks actually make, but

    We have cache affinity already. The scheduler does the work for us. There is
    certainly scope for pulling tricks like when we do I/O involving copies to
    userspace from networking we switch the cpu that task allegedly last ran on
    to be the CPU that blasted all the data into memory

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