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SubjectRe: Half duplex serial support
   Date: Wed, 27 Oct 1999 14:19:52 +0100
From: David Woodhouse <David.Woodhouse@mvhi.com>

Mostly, we have FIFOs in hardware and we don't actually receive each
byte. IIRC, the behaviour of a 16550a is to interrupt either when
the FIFO gets to a certain fullness, or if there's data in the FIFO
and then an idle period.

If the latter is configurable, then we can set it to 33 bit times,
and then any interrupt without a full FIFO tells us that there was an
idle period.

It's not configurable, and unfortunately the idle timeout is 4 character
times.... which is too long. So if you really care about getting the
exact 3 character timeout, you'd have to diable the receive FIFO on the
UART. Ugly! Or you can cheat and just check for 44 bit times. :-)

- Ted

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