Messages in this thread | | | Subject | Re: Buggy HLT instruction in Cyrix M2 or error in ATAPI CDROM code ? | Date | Mon, 18 Oct 1999 12:58:13 +0100 (BST) | From | Alan Cox <> |
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> I tried to find how many cycles it takes for the cyrix to wake up from 'hlt > mode'. There's good (approx. 150 pages) mii_all.pdf on the cyrix site, with
The Cyrix goes from the TSC stopped and really powered right down so it could well be longer but that is speculation
> My (humble) theory is that the CPU misses the interrupt or cannot react in > timely fashion when in 'hlt mode' and my Maxtor hard drive just waits a little > bit longer than the CDROM .
Interrupts are queued. The flow is
Hardware raises PCI IRQ Chipset passes it on to CPU CPU must perform some action to the hardware to make the hardware drop it
So if the CPU is asleep the IRQ stays asserted.
Alan
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