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    SubjectRe: APIC IO changes in 2.1.118.
    On Wed, 26 Aug 1998 tmuller@agora.rdrop.com wrote:

    > Hi,
    >
    > I have seen the following changes to my system interrupts after moving from
    > 2.1.117 to 2.1.118.
    >
    > IRQ CPU0 CPU1 Type Device
    >
    > 19: 23 24 IO-APIC-Level Intel EtherExpress Pro10/100 Ethernet
    >
    > to
    >
    > 9: 0 0 XT-PIC Intel EtherExpress Pro10/100 Ethernet
    >
    >
    > Is this the desired behavior? If so, I don't see any interrupt requests in
    > the new scheme of things for either CPU for the Ethernet card.
    >

    In "io_apic.c" comment out interrupt 9 at line #1180
    there is a mix IMHO of IRQ 2 and IRQ 9

    1163:void __init setup_IO_APIC(void)
    1164:{
    1165: init_sym_mode();
    1166:
    1167: /*
    1168: * Determine the range of IRQs handled by the IO-APIC. The
    1169: * following boards can be fully enabled:
    1170: *
    1171: * - whitelisted ones
    1172: * - those which have no PCI pins connected
    1173: * - those for which the user has specified a pirq= parameter
    1174: */
    1175: if ( ioapic_whitelisted() ||
    1176: (nr_ioapic_registers == 16) ||
    1177: pirqs_enabled)
    1178: {
    1179: printk("ENABLING IO-APIC IRQs\n");
    1180: io_apic_irqs = ~((1<<2)| /*(1<<9)|*/ (1<<13));
    1181: } else {
    1182: if (ioapic_blacklisted())

    Cheers,
    Andre


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