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    SubjectRe: Future Domain TMC-8xx fixup

    > > This differs from my prev. version: I no longer do usleep(1) in tight
    > > loop. Instead, I know that ISA read will cost at least 0.125usec (is
    > > there better estimate available?). Please, roll this in.
    > Applied.


    > Btw, as far as I know, an ISA read will cost closer to 1 usec rather than
    > 1/8 usec.
    > Yes, the ISA bus is 8MHz, but when you actually do a read that's not just
    > one bus cycle, even in theory it's at least two cycles (one to assert the
    > address, one to get the result), and in practice it seems to be noticeably
    > more.

    Hmm, seems that my machine gets 3.5MB/sec from this 8bit card, so
    access can not take much more than 2 ISA cycles. 2 cycles / read mean
    that I can make timeout 2 times less. I'll test it a bit, expect tiny
    patch somewhere later. Fortunately, timeouts are not too critical in
    this code.

    > Nitpickers will add to that the subtractive decoding of PCI->ISA,

    Unfortunately there are machines without PCI...


    I'm really Pavel
    Look at ;-).

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