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SubjectRe: patch to trim page table cache
Linus Torvalds wrote:

> Other than that processes can indeed migrate freely (we may allow fixing
> them to one CPU as that's not very hard to do, but that has to be asked
> for explicitly).
>

Please consider adding the ability to optionally disable global IPI delivery
for locked CPU¨s. A CPU, running hard realtime algorithms that fit in L1,
may not need these. Thus, only invalidate the TLB when the CPU is exiting
from the locked mode. Also, consider the ability to optionally to disable
the APIC
timer interrupt. Again, a locked CPU may not need this and when an algorithm
is
debugged it may be permanently locked to a CPU for the duration of the entire

system uptime.

Ove



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