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    SubjectRe: MMX based IP-checksumming patch, 2.1.105, RFC
    On 19 Jun 1998, Tkil wrote:
    >has this been tried on an AMD K6 yet? i thought they had a fast
    >MMX/FPU switch, an order of magnitude faster than the P5MMX. or is
    >this switch independent of the FPU save/restore times?

    My info's a little old (meaning I haven't read AMD's tech docs in a while,
    but I was under the impression that the K6 has a separate unit for MMX
    instructions, thus eliminating the penalty that Intel chips have because
    they make their fpu do double duty.

    Pat

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    Patrick St. Jean '97 XLH 883 psj@cgmlarson.com
    Programmer & Systems Administrator +1 713-977-4177 x115
    Larson Software Technology http://www.cgmlarson.com


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