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SubjectRe: Everything you want to know about time (Was: Cyrix 6x86MX and Centaur C6 CPUs in 2.1.102)
Date
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--snip interesting description of Cyrix behaviour--
>> Sorry if I am being picky, but this is not quite so. The Cyrix doesn't
>> destroy the TSC or anything of the sort.
>
> Sorry, but I *am* right. Look carefully at the code. It is *impossible*
> for the Cyrix to generate a divide-by-zero Oops (which has been
> experimentally verified by numerous sources) *unless* the Cyrix is
> zero-ing the top 32 bits of the TSC on HLT. I call that "destroying the
> TSC".
>
> It is impossible to Oops if the Cyrix is just stopping the TSC.
> The times will be off, but no Oops.
>

Since the upper 32 bits only change every few seconds, can't we
count them synthetically with a normal timer interrupt (by looking
at the TSC off course, we don't want this number to slowly drift) ?
and from that derive an offset to what the counter shows or update the
TSC (are the upper 32 bits writable ?)

e.g. run each second code like:

count_high() {
static uint32 old_low = 0, high=0;
uint32 new_low;

new_low = get_low_32_bits(TSC);
if (new_low < old_low) high++;
old_low = new_low;
}

The "real" value of the tsc would then be found by running count_high()
explicitely and calculating high*2^32+old_low,
a number that would not be influenced by stores of the TSC

If the upper 32 bits of the TSC are writable we can even write high into
them (if we are far enough from the wrap of the low 32 bits at least, but
we should be if we only write just after high really got incremented).

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