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SubjectRe: Cyrix 6x86MX and Centaur C6 CPUs in 2.1.102
Date
> IMHO this is a trade-off. If one wants to have the processor dissipating
> < 150mW when Linux is idle, one has to power down the 200MHz or so
> 64-bit TSC counter circuitry.

The Centaur doesnt have this bug and still has a low power mode. They do
it right. So it is a bug in the Cyrix chip.

> I wouldn't call this a bug. It's clearly an explicit design choice by
> the Cyrix 6x86MX CPU designers. Unfortunately it's not correctly
> documented in the 6x86MX Data Book.

Its a bug. The requirement is that it gives unique values. The C6 step
1 appears to know to increment the counter by 1 as it comes out of sleep
mode. The fact its not documented in the Cyrix data book alone makes it
a bug ;) Anyway the workaround sorts that out.

> if ((boot_cpu_data.x86_capability & 16) && (boot_cpu_data.x86_vendor !=
> X86_VENDOR_CYRIX) && !((boot_cpu_data.x86_vendor == X86_VENDOR_CENTAUR)
> && (boot_cpu_data.x86_mask == 0))) {
> ...

Cool.

Alan


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