lkml.org 
[lkml]   [1998]   [May]   [18]   [last100]   RSS Feed
Views: [wrap][no wrap]   [headers]  [forward] 
 
Messages in this thread
    /
    Date
    From
    SubjectRe: Cyrix 6x86MX and Centaur C6 CPUs in 2.1.102
    On Mon, 18 May 1998, Phil's Kernel Account wrote:
    > On Mon, 18 May 1998, [ISO-8859-1] André Derrick Balsa wrote:
    >
    > #I have a question. The 6x86MX allows one to lock L1 cache lines. Would
    > #it be interesting to group some kernel variables and keep them in the L1
    > #cache? Would that increase the kernel performance during context
    > #switches?
    >
    > First off, YES. You *CAN* lock L1 cache lines. I personally don't suggest
    > it, but you can do it. And you probably could, it probably would.
    >
    > #Please give me a hint of which data structures could be kept in the L1
    > #cache, and their size.
    >
    > Uh, Alan? Linus? Hints?

    A good candidate would be the first lines of the
    task_struct and tss structs of the top 4 CPU using
    processes.
    Or maybe some very-often-used kernel structure.

    Rik.
    +-------------------------------------------+--------------------------+
    | Linux: - LinuxHQ MM-patches page | Scouting webmaster |
    | - kswapd ask-him & complain-to guy | Vries cubscout leader |
    | http://www.phys.uu.nl/~riel/ | <H.H.vanRiel@phys.uu.nl> |
    +-------------------------------------------+--------------------------+


    -
    To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
    the body of a message to majordomo@vger.rutgers.edu

    \
     
     \ /
      Last update: 2005-03-22 13:42    [W:0.019 / U:10.316 seconds]
    ©2003-2017 Jasper Spaans. hosted at Digital OceanAdvertise on this site