Messages in this thread | | | Date | Mon, 18 May 1998 22:00:58 +0200 (MET DST) | From | Rik van Riel <> | Subject | Re: Cyrix 6x86MX and Centaur C6 CPUs in 2.1.102 |
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On Mon, 18 May 1998, Phil's Kernel Account wrote: > On Mon, 18 May 1998, [ISO-8859-1] André Derrick Balsa wrote: > > #I have a question. The 6x86MX allows one to lock L1 cache lines. Would > #it be interesting to group some kernel variables and keep them in the L1 > #cache? Would that increase the kernel performance during context > #switches? > > First off, YES. You *CAN* lock L1 cache lines. I personally don't suggest > it, but you can do it. And you probably could, it probably would. > > #Please give me a hint of which data structures could be kept in the L1 > #cache, and their size. > > Uh, Alan? Linus? Hints?
A good candidate would be the first lines of the task_struct and tss structs of the top 4 CPU using processes. Or maybe some very-often-used kernel structure.
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